1. Field of the Invention
The invention relates to video display devices, and more particularly, to converting from a first display resolution to a second display resolution using image frame synchronization.
2. Description of the Prior Art
Graphics systems display images on display screens. For example, a computer system may display an image on a flat-panel monitor. Television systems and cameras are additional examples of such graphics systems. To achieve the display of an image, the image is generally represented by image data (e.g., RGB data), and display signals are generated from the image data. The standard VGA format is 640 pixels wide by 480 pixels high.
FIG. 1 shows a timing diagram 10 of the typical display signals for a VGA system. The display signals including a vertical sync signal VS indicating the beginning of each screen, also called a frame; a horizontal sync signal HS indicating the beginning of each row, also called a horizontal line; a data enable line indicating the pixel data in each scan line, and a clock signal. As shown in FIG. 1, a first frame starts at the first leading edge E1 of the vertical sync signal and a second frame starts at the second leading edge E2.
As graphics systems continue to have higher and higher display resolutions, a need emerges to convert image data from a first resolution to a second resolution. Graphics systems typically use special circuitry to convert image resolution. Examples of such circuitry include the well-known graphics controller chips typically housed on a motherboard of a computer system and LCD control chip sets provided with LCD panels and video cameras.
For most new displays, it is sufficient to use the same frame rate for the source display signals and the destination display signals, simplifying the design and reducing the required memory. This technique is called frame synchronization and involves generating a destination frame for each source frame received and outputting the destination frames at the same rate as the source frames are received.
A significant timing problem is inherent in frame synchronization. The source signals contain both visible horizontal lines and non-visible horizontal lines. Resolution is normally specified in terms of visible pixels only but, in actuality, there are the additional non-visible horizontal lines and non-visible pixels at the ends of the visible horizontal lines. If a resolution is converted from x to y then the ratio of x:y must also hold for the non visible horizontal lines. An example of where difficulties are encountered is when converting frame signals for a typical VGA system. As previously mentioned, the typical VGA system is 640×480, or 480 horizontal lines; however, in actuality there are approximately 504 horizontal sync signals sent for each vertical sync signal. The extra horizontal lines are not visible but are present to allow the display device time to return to the upper left corner before beginning the next refresh cycle. The ratio of visible source horizontal lines to visible destination horizontal lines must be equal to the ratio of total source horizontal lines to total destination horizontal lines. If a destination display device having a resolution of 1280×1024 is to be used, this equates to 1024/480*504 or a total of 1075.2 destination horizontal lines. The value of the destination horizontal lines must be an integer but if this value is rounded up, overflow occurs because the source frame rate will be higher than the destination frame rate. Conversely, if this value is rounded down, underflow occurs because the source frame rate will be lower than the destination frame rate.